TY  CONF
TI  AUTOMATION OF VERIFICATION OF ANALOG-TO-DIGITAL PATHS OF ON-CHIP SYSTEMS USING UVM METHODOLOGY
KW  UVM-MS
KW  mixed-signal verification
KW  System-on-Chip (SoC)
KW  ADC
KW  automation
KW  functional coverage
KW  SystemVerilog
KW  reference model
KW  reuse
KW  MS Bridge
JO  MODELING INFORMATION SYSTEMS AND TECHNOLOGIES – 2026
AU  Tarlykov, S.S.
AU  Tyunina, A.M.
PY  2026
PB  FSBE Institution of Higher Education Voronezh State University of Forestry and Technologies named after G.F. Morozov